If you're not busy watching the Inauguration on the 20th, you'll have time to attend several events...

** Introduction to Chips and EDA – This one's for a non-technical audience and is being hosted by EDAC on Thursday, January 20th. This popular tutorial will again be given by Synopsys' Karen Barleson, and includes: a simplified explanation of how chips are made, a portrayal of how chip designers use EDA tools, and an opportunity to see and examine the parts that make up chips and electronic products. Come and ask quesions about semiconductors, synthesis, DFT, simluation, DFM, and tapeout. If things seem confusing at times, this tutorial can only help. It starts at 8:30 and runs til noon, and is happening at the Software Developer's Forum in San Jose.

** SDForum Distinguished Speaker Series – This month's speaker, appearing on January 20th at Xerox Parc in Palo Alto, will be Craig Newmark, who'll be talking about "What's Craigslist About: What Have We Learned, Where Are We Going." Orginzers are providing this bio on Craig:

Craig Newmark is a senior Web-oriented software engineer, with 25 years of experience including 18 years at IBM. In 1995, Newmark started craigslist which serves as a non-commercial community bulletin board with classifieds and discussion forums. Using a common sense, down-to-earth approach, craigslist strives to make the 'net more personal and authentic, while advocating social responsibility through the promotion of small, non-profit organizations. The philosophical themes of craigslist are listed as:

* We're about people giving each other a break.
* We're about restoring the human voice to the Internet, reversing the corporate voice and over commercialization.
* We're about providing useful, down-to-earth, common-sense function.

Sounds good to me.

** Nanotechnology and Nanoelectronoics Forum – The Forum will take place January 21st and is being offered by the Silicon Valley Technical Institute in cooperation with ISQED. Speakers will include: NASA's Meyya Meyyappan: A Review of Recent Development; IBM's Hans Coufal: Nanoscience for Information Technology; Intel's Sadasivan Shankar: Challenges and Opportunities for Materials in Nanotechnology; Nanaplex's Ian Walton: Applications of Encoded Nanoparticles; HP's S.Y.Wang: A nanoscale Non-volatile Molecular Memory; Stanford's Krishna Saraswat: Future Device Requirements for Nanoelectronics; Quantum Insight's Wasiq Bokhari: Practical Nanotechnology; and Nanogram's Shiv Chiruvolu: Nanoscale Materials Technology for Components & Devices.

** DesignCon 2005 – Organizers say that DesignCon, sponsored by the International Engineering Consortium (IEC), is "developed specifically for semiconductor and electronic design engineers, and is the essential design engineering event addressing the challenges facing these communities and providing the solutions attendees can implement immediately in their designs." The conference is happening January 31st through February 4th at the Santa Clara Convention Center.

In a recent letter, Brian Baily noted that in addition to the traditional focus on high-speed boards, interconnect, and packaging: "DesignCon is also emerging as one of the top functional verification conferences. Unlike most conferences, DesignCon is meant for engineers. The papers are given by engineers, and the industry technologists with real world experiences that they wish to share with other engineers."

This year, the DesignCon keynoters include Synopsys' Aart de Geus, Mentor Graphic's Wally Rhines, and Cadence's Mike Fister.

I'm grateful to the folks at Synopsys for forwarding the following suggestions as to what Aart de Geus will be commenting on in his particular keynote:

Dr. de Geus will review the technological and economic pressures occurring in the electronics industry today – including the impact of globalization – and he will talk about the various, special pressures on semiconductor design. He will note that today's design challenges break down into a number of specific, but interdependent areas, all of which have an impact on QOR (quality of results), TTR (time to results), and COR (cost of results).

In particular, Dr. de Geus will focus on COR, and yield, but he will also talk briefly about power and other design challenges as well. The address will indicate that the key to dealing successfully with these separate, but interdependent challenges, lies in employing a systemic solution that takes all of them into account.

Meanwhile, as you plan your days at DesignCon, keep in mind the Executive Forum sessions:

February 1st – Noon to 12:30 PM
Keynote – Aart de Geus, Synopsys

February 1st – 2:00 pm to 3:15 PM
Panel: "Enabling Innovation on Today’s Design Teams"
Chair: Colin Shepard, Tektronix

February 1st – 3:45 PM to 5:00 PM
Panel: "The Power to Innovate: What Critical Links in the Design Chain Can Make or Break a Power-Efficient Design?"
Chair: Gary Smith, Gartner Dataquest

February 2nd – 9:00 AM to 10:20 AM
Panel: "Simplifying the Future: The Business Impact of Electronic System-Level Design"
Chair: Mark Milligan, OSCI

February 2nd – 10:30 AM to 11:45 AM
Panel: "Design Verification: From Specification to Closure"
Chair: Sergio Camerlo, Cisco Systems

February 2nd – Noon to 12:30 PM
Keynote – Wally Rhines, Mentor Graphics

February 2nd – 2:00 PM to 3:15 PM
Panel: "Leadership in Times of Change: Sourcing Skills Differently – Why, What, and How"
Chair: Steve Warntjes, Agilent Technologies

February 2nd – 3:45 PM to 5:00 PM
Pamel: "What Is Design for Yield and How Do We Get There?"
Chair: Gabe Moretti, EDN Magazine

** IEEE ISSCC 2005 – The International Solid-State Circuits Conference, as the companion conference to IEDM, is described by the organizers as "the foremost global forum for presentation of advances in solid-state circuits and Systems-on-a-Chip. The Conference offers a unique opportunity for engineers working at the cutting edge of IC design to maintain technical currency, and to network with leading experts."

ISSCC is taking place from February 6th to 10th at the San Francisco Marriott Hotel. If you're working at the cutting edge, attendance should be required.

** DVCon 2005 – Organizers says the conference, which is taking place February 14th to 16th at the DoubleTree Inn in San Jose, will include valuable information for design and verification engineers, EDA professionals, university researchers, and industry leaders.

Program highlights will include a keynote from Mentor Graphics CEO Wally Rhines, and four sponsored tutorials covering:

* "SystemVerilog Assertions: Best Practices for Functional Verification" – sponsored by Synopsys
* "Pragmatic ABV: Effective Assertion-Based Verification" – sponsored by Cadence
* "Transitioning to SystemVerilog for Verification" – sponsored by Mentor Graphics
* "Transaction-Level Modeling with the New OSCI SystemC TLM Standard" – also sponsored by Cadence

Meanwhile, nobody's going to miss the John Cooley's Panel of Executives chatting about every little thing on Tuesday, the 15th ... an event that always turns out to be the social event of the season.

** DAC 2005 Nominations – With an eye to DAC 2005, nominations are being accepted up until March 4th for the Marie R. Pistilli Women in EDA Achievement Award. The DAC Committee says this yearly tribute recognizes individuals who have visibly helped advance women in the EDA industry.

Per the Press Release: "To be considered, the nominee should show leadership for the launch of a successful product that included contributions from women or a program that has created opportunities for women. Or, the nominee could be the leader of a company or organization that has helped raise the awareness of women or has been a mentor or role model for successful women. The award, named for the former organizer of the DAC is open to both males and females with technical or non-technical backgrounds in industry or academia. Last year's winner was Dr. Mary Jane Irwin who holds the title of the A. Robert Noll chair in the Department of Computer Science at Pennsylvania State University."

** EDN Magazine's 15th Annual Innovation Awards – The Innovation Awards ceremony and dinner will be held March 7th at the historic Palace Hotel in San Francisco. Organizers say that Geoffrey Orsak, Dean of Southern Methodist University School of Engineering, will address attendees gathered to honor this year's award winners.

Maury Wright, EDN Editor-at-Large, is quoted in the Press Release: "When it comes to engineering education, Dr. Geoffrey Orsak is one of the brightest minds in the world and an expert in his own right in the area of signal processing and communications. He has a global view of how the engineering profession is evolving and of the educational obstacles that we face here in North America - starting with the way science and engineering are discouraged in K-12 schools. Geoffrey is an exceptional speaker, and I am confident he will captivate our audience."

In addition, Walter Mossberg, The Wall Street Journal's personal-technology columnist will also be a featured speaker at the EDN Innovation Awards. Organizers say Mossberg will address "the furious pace of innovation in consumer technology and what it means to the individual and society – especially since the consumer sector, not the corporate sector, now leads in innovation. And with his trademark candor, apparently he's promised to say why he likes some products and dislikes others.

Stephen Moylan, EDN Vice President and Publishing Director, is quoted in the Press Release: "Walt Mossberg is the King Midas of the tech industry. With his golden touch, he can turn a product into marketing gold or relegate it to the basement. His keen eye for innovation and technology that helps us work and live better brings a new dimension to our Awards program." Wow.

** DATE 2005, which is described by organizers as "Europe's premier conference and exhibition for Electronic Design, Automation and Test," says that it has received an all-time record number of submissions to the conference program. The event, which takes places from March 7th to 11th, has received 825 submissions to date for review by the 342 members of the Technical Programme Committee.

It's not surprising that the organizers are excited by these numbers as they are reporting that the number of papers submitted "is the highest number of papers ever submitted to an electronic design conference anywhere in the world." Those submissions have been received from five continents and more than thirty countries. You should be booking your flight for Munich right now !

** DAC 2005 – Speaking of the Design Automation Conference, please get it on your calendars now, in ink:

June 13th to the 17th
Anaheim Convention Center

And don't forget: "DAC is the annual event where the electronics design community meets for a week-long forum of information exchange on management practices, products, methodologies and processes. Attended by more than 12,000 developers, designers, researchers, managers and engineers from leading electronics companies and universities worldwide, it offers a robust technical program covering the industry’s hottest trends. Its vibrant exhibit floor includes more than 200 companies, many of whom are startups just introducing their first products. The conference is sponsored by ACM’s Special Interest Group on Design Automation, the Circuits and Systems Society and Computer Aided Network Design Technical Committee of the IEEE, and EDAC."

You and I know, we'll all be there!