People Week of May 24, 2004
Blue Pearl Software, Inc was launched on Monday, May 24th, to provide tools to automate the process of RTL closure for IC and electronic system design. Blue Pearl says its software will "enable functional design, timing, and design-for-test (DFT) closure at the RTL level. Its analysis and verification software identifies functional issues in the RTL design and reduces the number of design iterations required to meet timing and test requirements by resolving critical timing path and DFT issues. Blue Pearl’s proprietary technology helps to significantly reduce both time-to-market and design costs, and reduces or eliminates the substantial costs of functional design errors." The Blue Pearl management team includes Ellis Smith at President & CEO, Prab Varma as Vice President of Engineering and CTO, Rick Dissly as CFO, and Carol Hallett as Vice President of Worldwide Sales. The Board of Directors includes: Athanasios "AK" Kalekos, Michael Bohm, and Mark Fuccio, You can read comments from several company executives regarding the launch in Ideas. Stelar Tools, Inc. was also launched on the 24th. The company says it develops tools to enhance the productivity of companies re-engineering ASIC, SoC, and FPGA HDL designs. Stelar's "patent-pending" technology is promising to enable designers and managers to simplify the complexity of design and manage the risks inherent in the effort by letting their tool users navigate, explore, analyze, modify, and view design change impact, while also documenting the designs using a variety of graphical and textual views of the design. The Stelar Tools management team includes CEO Joe Tanous, Vice President of Marketing Steve Sapiro, CTO Larry Carner, CFO Jack Winter, Director of Product Marketing Mike Lottridge, and Director of Engineering Scott Bloom. The Press Release says the team has a combined 110 years' experience in EDA. Oh my. Comments from Joe Tanous are also included in this week’s article in Ideas. eASIC Corp. announced that it has secured $5 million in equity financing from Kleiner Perkins Caufield & Byers, in a third round of funding. The company says that previous funding rounds involved angel investors and "semiconductor industry veterans." The company also announced that KP partner Vinod Khosla is joining the eASIC Board of Directors. Per the Press Release: "The new funds will be used to complete the Structured ASIC product family and tools set that are being jointly developed with Flextronics Semiconductor and Magma Design Automation. These products are based on eASIC’s innovative Structured ASIC technology that has been validated by ST Microelectronics and proven in silicon for its high performance and density. The first product member has been taped-out and the full family is scheduled for production release at 0.13-micron process technology in early 2005. In addition, the funding will be used for enhancing sales and marketing, promoting the Structured eASIC product in the U.S. and Japan." Catalytic Inc. announced that Jim Peterson has joined the company as Vice President of Engineering, reporting to Randy Allen, the company’s Founder and CEO. Peterson has 30+ years of experience in the management of computer software and hardware development, and for the last 15 years has specialized in web technologies and electronic publishing for enterprise software. Most recently, Peterson was Vice President of Engineering and Product Management at Remedy, a BMC Software Company. Prior to Remedy, he served in various management capacities at Liberate Technologies and Adobe Systems. Peterson has a BS in applied physics from the Cal Tech and an MSEE from UCLA. Aldec, Inc. announced that it has joined the PSL/Sugar Consortium (the Property Specification Language promoted by the PSL/Sugar Consortium). David Rinehart, Director of Marketing for Aldec, is quoted in the Press Release: "Aldec understands the value in adopting and promoting the use of standards throughout the industry. As standards such as PSL become available, we intend to readily adopt them and help our customers with a smooth transition path so that they can begin to reap the benefits of these valuable, universally accepted languages." Cadence Design Systems, Inc. announced the opening of its first office in Moscow. Ray Bingham, now Chairman of the Board of the Directors has been in Moscow to help unveil the new facility, which Cadence describes as "the first EDA research and development center opened in Russia by an overseas company. The collaborative program is designed to benefit Russia's high-tech industry by developing a continuous stream of master's degree graduates with leading-edge skills in electronic design." The Moscow office will have 70+ employees focusing on EDA tool development and methodology services, and will serve as Cadence's Russian center for training, scientific endeavors, large-scale educational programs, and local customer support. Ray Bingham is quoted in the Press Release: "Russia has become a center of electronic design excellence, with many major global technology companies having facilities here. There are many exceptionally talented electronic designers and engineers in Russia. This research and development center will become one of the cornerstones of electronic design excellence in this country, and Cadence is committed to support Russia's growth as a technology leader." Arithmatica, Inc. announced it is expanding its business to Japan and Korea through exclusive distributor relationships with Marubeni Solutions Corp. and SysVERI Co., Ltd. respectively. IMEC and Praesagus Inc. announced a "technology development agreement." The entities say the terms of the agreement is two years, and the partnership will "build on Praesagus' physics-based interconnect thickness variation modeling technology and expand the scope to include copper/low-k and three-dimensional modeling. The partnership will leverage IMEC's copper damascene, ultra low-k dielectric and 65-nanometer expertise and experience." Hugo De Man, IMEC Senior Research Fellow and Phil Kaufman Award winner, is quoted in the Press Release: "The current design for manufacturing (DFM) communication paradigm of CMP design rules and worst-case thickness tech files is running out of steam and the recently proposed alternative of density-based models does not provide enough accuracy. In our system-level integration program, IMEC is researching the impact of process variability in deep-submicron technologies on circuit and system level. Variability in interconnect RC delays is a main concern as we are scaling down technology beyond the 90-nanometer node. Praesagus' expertise in physics-based modeling of interconnect technology offers a promising alternative to accurately predict the interconnect performance, serving as a critical input to system designers." Magma Design Automation Inc. announced it has become a corporate member of Accellera. The company says that by joining Accellera, it has pledged to become actively involved in defining and evolving the SystemVerilog standard, implementation efforts, and interoperability definitions. Dennis Brophy, Chairman of Accellera, is quoted in the announcement: "Magma is an influential EDA leader and we welcome the company as a new Accellera member. Our ongoing standards efforts will benefit from Magma’s active participation and valuable technical expertise." NEC Electronics Corp. and Synplicity, Inc. announced the companies have entered into a worldwide OEM agreement whereby NEC Electronics will bundle and distribute a license for Synplicity’s Amplify ISSP Physical Optimizer software within NEC Electronics’ OpenCAD design environment for use in the development of its Instant Silicon Solution Platform structured ASICs. The companies say the Amplify ISSP physical synthesis software is the result of nearly two years of joint development between the two companies to provide their mutual customers with a physical synthesis solution customized for NEC Electronics’ ISSP-1 (150-nanometer) and ISSP-90 (90-nanometer) structured ASICs. Under the terms of the agreement, NEC Electronics will provide the Amplify ISSP software to all of its ISSP customers. Meanwhile, Synplicity announced its Board of Directors has authorized a stock repurchase program of up to one million shares of its common stock over the next 12 months. Shares will be repurchased in the open market at times and prices considered appropriate by the company. The company says the program is effective immediately. The timing of purchases and the exact number of shares to be purchased will depend on market conditions. As of April 30, 2004, Synplicity had approximately 26 million shares of common stock outstanding. ProDesign announced it has joined the Novas Harmony Program. Novas Software and ProDesign say that the addition of ProDesign as a member of the program will allow the two companies to offer tools that interoperate through a single unified interface to optimize the verification flow and reduce tool complexity. |