People

July 18, 2005

Despite the recent drubbing in ESNUG with regards to Dataquest's prognostications at DAC 2005 on the ESL market – I think a lot of people believe this stuff is real and that it's moving forward at a tidy clip.

For instance, everybody's favorite techno-gurus – Brian Bailey, Grant Martin and Andrew Piziali – are writing a book about ESL and they'd like to hear from you (see below).

But first ….

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It's the end of an era …

Cadence Design Systems announced that Executive Chairman Ray Bingham will be retiring on July 31st. Bingham has been Executive Chairman since May of 2004, was President and CEO for the 5 years prior to that, and started out his first 6 years at Cadence as Executive Vice President and CFO – way back in the misty past when Joe Costello was at the helm. Pretty astounding.

All told, Bingham has been with Cadence for 12 years. That's amazing in anybody's book. Who else that you know of has survived 12 years at the same company in Silicon Valley – especially over these last 12 years?

The company says Bingham's departure signals the successful completion of "the transition of executive leadership to Mike Fister, President and CEO, which commenced with Fister's appointment in May 2004."

Bingham says, via the Press Release, that he leaves the keys to the kingdom in good hands: "Mike [Fister] brings tremendous talent, experience and energy to Cadence, and has my greatest confidence. The last six years have been exciting but extraordinarily demanding, and the time is now right for me to step down and focus on my many other commitments. I am extremely proud of our numerous accomplishments. We have restored our technology leadership and forged major strategic partnerships with key industry leaders. I am very grateful for the dedication and many contributions of our talented employees and management around the world in helping to realize those strategic goals."

In response, Fister says – also via the Press Release – that in accepting the keys to said kingdom he acknowledges: "Ray led Cadence with a steady hand during a period of tremendous uncertainty in the EDA and semiconductor industries. We are grateful for what Ray has done for the company during his tenure. His untiring efforts to strengthen the company's technology leadership and nurture key strategic partnerships give us a strong foundation on which to build. I personally thank him for working with me so closely over the last year to ensure a smooth leadership transition."

Ray Bingham is also retiring from his role as Chairman of the Board of Directors. His successor will be John Shoven, Charles Schwab Professor of Economics at Stanford and Director of the Stanford Institute for Economics Policy Research. Shoven has been a member of the Cadence Board of Directors since 1992, has been serving as the Board's Lead Director and is currently Chairman of the Corporate Governance and Nominating Committee and a member of the Audit Committee.

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In honor of the end of the Bingham Era, I would invite you to re-visit interviews with Ray Bingham, Mike Fister, and Joe Costello that live here on EDA Confidential.

* Ray Bingham
* Mike Fister
* Joe Costello

Meanwhile, I want to extend my personal best wishes to Ray. I have enjoyed our several conversations over these last several years, and am quite sure he will continue to put his talents and discipline to good use in a variety of deserving venues going forward.

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Pipe up & Chime in on ESL …

Brian Bailey, Grant Martin and Andrew Piziali are planning to write a book on "Electronic System-Level" (ESL) design and verification.

As part of the preparation of the proposal and the outline, they are soliciting opinions from across the industry on several questions related to ESL. This includes end-users, EDA companies and academia.

Although they were looking for input by July 14th, perhaps you could drop them a line anyway, if you have any comments in response to the following questions. Send your thoughts to:

Brian Bailey
brian_bailey@acm.org


Here are the questions ...

Questions for everybody:

* What is YOUR definition of "ESL" design and verification?

* Is "ESL" the right term? If not, what would you suggest?

* Is there a viable generic ESL tools industry? If yes, what is the evidence for this? If no, why?

* Do ESL tools belong with IP? What does the IP industry need to deliver for ESL design and verification?

* Is model interoperability important for ESL design and verification? What is needed to make this real?

* Are automated implementation flows into both HW and SW important for ESL design and verification? Necessary or just useful?

* Is there a geographic component to the use of ESL design and verification? If so, explain. Is it cultural, or related to the types of design most predominant in particular geographies or both?

* If viable ESL tools and methods exist, will they still be limited in use to a few system architects? What other communities of designers exist who would use ESL tools, and Why?

* Please feel free to add any other comments that you would like to make about ESL

* Would you be willing to author a chapter of the book related to your area of expertise? We cannot promise that all people who volunteer will be accepted as the chapters have not yet been defined.

* May we use or quote you on any of the statements that you make or should it be treated as anonymous?

Questions for folks in academia:

* What is the most promising research that would enable ESL design and verification?

* Where are the biggest problems or barriers to creation of ESL design and verification solutions?

Questions for folks who do design:

* What aspects of ESL do you think you are the most likely to adopt?

* What ESL design and verification tools would you like to adopt?

* What message(s) do you here from the EDA companies related to ESL design and verification?

* What do you think it will actually provide?

Questions for folks who make ESL design tools:

* What do you believe is the ESL design and verification tool space, and how do you play in it?

* Which technologies do you believe are missing or not well enough developed?


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And speaking of System Level R&D …

Zuken says it was the EDA vendor representative in the multinational MESDIE (microelectronic EMC system design for high density interconnect and high frequency environments) research project, whose aim was to research modeling for new chip sets, dedicated high density interconnect (HDI) and package modules for applications facing EMC/noise and system integration in the telecommunications, automotive, consumer and multimedia sectors. Try saying al of that 10 times fast.

MEDEA, which is the pan-European program for advanced co-operative R&D in microelectronics, drove the MESDIE project, which entailed 200+ man years over three years. Per the Press Release: "By working in partnership with companies such as Airbus, Alcatel, Bosch, Infineon, Continental, Philips and ST-Microelectronics, the project has begun forming the basis of methods of modelling and simulation at the system design level … Although the MESDIE project came to end in May 2005, the success has already resulted in talks about extending the research and development in this area."

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In other news – first the good news …

** Zenasis Technologies, Inc. announced that Dennis Harmon has been named President CEO, and has been appointed to the company's Board of Directors. Former CEO and co-founder Jay Roy will continue as Chairman of the Board and CTO.

Harmon has 20+ years of management experience in the EDA industry. Most recently he was Co-founder and CEO of Synchronicity (recently acquired by MatrixOne). Prior to Synchronicity, Harmon served in various management roles at Viewlogic Systems (acquired by Synopsys).


** Silicon Border Development announced it has hired Octavio Garza as Vice President of Business Development and Administration. He will be responsible for business development for Silicon Border, as well as running the company's operations in Mexicali, Mexico. Silicon Border's Mexico offices will be based out of the CETYS University in Mexicali.

Previously, Garza spent 9 years at Sony Electronics Corp., where he served in a variety of management positions in strategic planning and administration, including deputy director responsible for manufacturing of $800M USD in electronics products annually with over 3,600 employees in Mexico. He also had held management positions with Deloitte & Touche and Monsanto. Garza has a BS in Biomedical Engineering from the University of Iberoamericana in Mexico City and an MBA from the Claremont Graduate School of Business.

Just so that you know … "Silicon Border is a 10,000-acre high-technology science park catering to the specialized needs of the semiconductor and other capital-intensive technology sectors. Planned for development along the U.S.-Mexico border in Mexicali, Silicon Border enables a cost-effective and competitive manufacturing alternative in North America for emerging and global companies. Improving upon the world's leading technology parks, the park's 15 square miles of world-class infrastructure and education will support the stringent requirements of the semiconductor, flat panel display, telecom, optoelectronic and biotechnology industries."


** Aprio Technologies says that KT Venture Group, the investment partner of KLA-Tencor, is investing in Aprio. Not surprisingly, Aprio says it will "use the investment to accelerate the development of technology that bridges the design and manufacturing disciplines."

Robert Lee, General Partner at KT, is quoted: "Aprio's solid product strategy and road map hold great promise to address the substantial challenges faced by semiconductor design and manufacturing companies in the years ahead. Aprio's strategy dovetails very well with KLA-Tencor's view of the DFM market. These facts formed the basis for our decision to invest in the company."


** The DAC Committee was delighted to report that the attendance numbers from Anaheim were excellent. Per the Press Release: "There were 5,505 general conference and exhibit attendees and another 4,689 event participants made up of representatives from the 240 companies exhibiting along with guests and visitors."

In addition, those who track such things reported that 2000 people attended Bernard Meyerson's opening keynote on Tuesday, June 14th, and 1000 people attended the CEO panel later that morning. The numbers for the closing keynote on Thursday, June 16th, were probably somewhat smaller, which is a shame – Ron Rohrer's Thursday keynote was probably the most candid and forthright of all of the week's presentations, bar none.

IBM's Bill Joyner served as General Chair for DAC 2005 in Anaheim, as you all know. He's quoted in the post-DAC Press Release: "DAC draws the world's best and brightest designers, researchers, engineers and top-level executives from industry and academia. This year's strong attendance, and the level of research presented and technology demonstrated, confirms the vitality of this industry which is so important to the global technology market."

Once again, The DAC Committee has reason to be proud of their efforts.


** Apache Design Solutions announced that Dian Yang has joined the company as Vice President of Business Development and General Manager of Asia. He reports to Andrew Yang, Apache’s chairman and chief executive officer (CEO). Yang has 18+ years' experience in the EDA and semiconductor industries. Most recently, he was Co-founder and CEO. InnoLogic was acquired by Synopsys in 2003, where he continued as a senior director leading the adoption and advancement of the InnoLogic products. Prior to InnoLogic, Yang held various management positions in SGI/MIPS, LSI, and Avanti. Yang has a BS from Shanghai University of Science and Technology and an MS and PhD in CS from Stanford University.

** Apache Design Solutions also announced that this past quarter has been a good one financially for the company. Contributions to their "record quarter" came from renewals and expansions within the existing customer base, as well as from new customers including Apache's first Korean customer. Per the Press Release: "Seven of the top 10 semiconductor companies worldwide have now adopted the RedHawk dynamic power signoff solution."


** IMEC and Semizone, Inc. have announced a partnership to jointly create and offer online learning content. Courses will cover system and IC design technology and IC process technology. For those of you who don't know, Semizone was founded in partnership with the Stanford Center for Professional Development to provide online learning services for the semiconductor and related industries. With the partnership, Semizone and IMEC say they will "address the needs of ASIC and SOC designers, process technicians and junior process engineers for leading-edge knowledge."

Gilbert Declerck, President and CEO at IMEC, is quoted: "In recent years, IMEC has invested substantially in e-learning. This also provides a comprehensive source of knowledge to the IMEC workforce, available for access on demand. Through our partnership with Semizone, we are now able to deliver leading-edge knowledge and IMEC-produced innovations to the global semiconductor industry through Semizone's global distribution and delivery system."

Mehrdad Moslehi, Chairman and CEO at Semizone, is also quoted: "Our business focuses on providing the latest industry-relevant knowledge and technological developments to the semiconductor industry workforce through a global online learning delivery platform. IMEC is a well-respected, internationally recognized research center, which jointly with Semizone, is now providing leading-edge educational and training content to the industry. Our alliance with IMEC should further enhance Semizone's online learning programs and methodology in Europe."

** IMEC also says it has opened its Advanced Packaging and Interconnect Center, APIC, "which is committed to play a central role in bringing together the different players in the IC food chain around joint research programs for future packaging and system-integration technologies. Focus lies on bridging the 'interconnect gap' between circuit and system, heterogeneous integration of RF-components and thermal management in high-power density devices."

"IMEC's advanced packaging and interconnect center gathers a number of competencies to tackle the challenges in future technologies for packaging and system integration. APIC offers solutions that are vertically and horizontally elaborated. Vertically in terms of technologies that range from the circuit up to the system level. Horizontally, because each level is supported by experienced teams in design, processing, analysis and reliability. This broad range of competencies within APIC feeds a number of well-defined research programs. All have an IC-centric approach and are driven by the semiconductor technology roadmap and by miniaturization of electronic systems; in particular those needed for ambient intelligence applications."


** The Embedded Microprocessor Benchmark Consortium (EEMBC) announced that benchmark scores are now available for the Applied Micro Circuits Corp. 667-MHz and 533-MHz PowerPC 440EP processors. The new 440EP processor scores will allow designers to make detailed comparisons between the 533-MHz and 667-MHz 440EP processor and other similar processors, which were tested in an out-of-the-box environment using a PowerPC 4.0.5 compiler from Green Hills Software, Inc.


** Nallatech announced that ACT/Technico has joined Nallatech’s Channel Partner Program, which offers geographic and OEM distribution contracts to qualified companies that market to the oil and gas – geophysical; defense and military; homeland security; bioinformatics; medical imaging and data distribution and visualization systems sectors for distribution of FPGA systems and reconfigurable computing hardware/softwareACT/Technico says it will market Nallatech products as a part of its customized embedded systems.

Ken Grob, Vice President of ACT/Technico, is quoted: "Nallatech’s FPGA solutions bolster our offerings to customers through their impressive performance and flexibility. Avoiding obsolescence is a key reason why our customers are looking to FPGA based solutions. We are looking forward to being able to provide enhanced duty and ruggedized versions of Nallatech’s high performance solutions to our military customers, and we welcome the opportunity to partner with one of the strongest forces in FPGA-based computing solutions."

By the way, in 2004 Nallatech says it increased revenues by 80%, with a 120% increase in bookings in North America alone. Nice.


** Celoxica Ltd. says that President & CEO Phil Bishop will be speaking at the 25th annual Adams Harkness’ Summer Seminar in Boston in early August. The Press release says Bishop will "outline the fundamental changes taking place in the electronics and semiconductor industries and how these changes are leading to new business opportunities and new applications of semiconductor design technology." Phil may have things to say that we all need to hear. If you can't be there, I'm sure the slides will be available after the fact.

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Now for the bad news …

The EDA Consortium's Market Statistics Service (MSS) announced that EDA industry revenue for Q1 of 2005 was $989 million, versus $995 million in Q1 2004.

Total product revenues, without services, were $912 million in Q1 of 2005 versus $918 million in the same quarter of 2004. Oh my!

Wally Rhines, EDAC Chairman and Chairman & CEO at Mentor Graphics, is quoted: "The industry continued to tread water in the first quarter. Continued weakness in North America offset the mild improvements in Japan and the Pacific Rim."

** The "gooder" details:

Reporting companies employed 20,859 professionals in Q1 2005, up 6% from the 19,700 reported in Q1 2004.

Printed Circuit Board and Multi-Chip Module revenue increased 3% in Q1 2005 to $87 million.

The industry's IP revenue totaled $82 million in Q1 2005, a 5% increase over Q1 2004, due in part to new company participation.

EDA Services revenue was $77 million in Q1 2005, up 1% from Q1 2004.

2005 Q1 revenue from Japan grew 2% over Q1 2004 to $242 million.

Rest-of-World (ROW) continued to extend previous years of revenue growth by increasing 2% to $119 million in Q1 2005.

** The "badder" details:

EDA's largest tool category, Computer-Aided Engineering, generated revenue of $464 million in Q1 2005, 1% less than the same period in 2004.

IC Physical Design & Verification revenue was $279 million in Q1 2005, 2% below the same quarter in 2004.

Revenue by Consuming Region:

North America, EDA's largest region, purchased $449 million of EDA products and services in Q1 2005, a 3% decline from Q1 2004.

Western Europe revenue was essentially flat in Q1 2005 with revenues of $180 million.

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In closing …

Kleiner Perkins Caufield & Byers (KPCB) announced former Secretary of State Colin Powell has become a KPCB strategic limited partner.

General Powell said, "I’ve been privileged to work with good people on important missions, and have known KPCB entrepreneurs and partners for years. Those entrepreneurs have passion for clear missions — building innovative, global businesses that better the world. I welcome the opportunity to help develop global leaders who deliver powerful innovation where we need it most."

John Doerr of KPCB said, "We are thrilled to welcome Colin to our team. He is passionate about innovations in communications, security, energy independence and health care. Colin is a gifted, ‘always-on’ communicator who loves technology. Secretary Powell offers entrepreneurs global strategic insights and wisdom about leadership. Colin is truly a great American, inspiring great American entrepreneurs, indeed, inspiring us all."

Ray Lane of KPCB said, "General Powell is one of the most influential leaders of our time. His strategic guidance in global affairs is invaluable. In our ‘flat world’ of global markets, global connections, and global competition, Colin adds tremendous value."

Brook Byers of KPCB said: "Secretary Powell is a world leader and humanitarian. We will work together to help social and tech entrepreneurs innovate across the planet – whether helping a venture ‘go global’ or bringing micro-credit and health care to remote communities in Africa."

Per the KPCB Press Release: "General Powell, 68, was sworn in as the 65th Secretary of State in 2001 after unanimous confirmation by the U.S. Senate. He served in the military for 35 years, and rose to the rank of 4-star General. His last assignment, from October 1989 to September 1993, was as Chairman of the Joint Chiefs of Staff, the highest military position in the Department of Defense. During this time, he oversaw 28 crises, including Operation Desert Storm in the 1991 Persian Gulf War. General Powell has also been recognized with several civilian awards, including two Presidential Medals of Freedom, the President’s Citizens Medal, the Congressional Gold Medal, and the Secretary of State Distinguished Service Medal. Powell has a BS from the City College of New York and an MBA from George Washington University. He also holds various honorary degrees from several universities."