When I was growing up in India, the game of cricket was growing in popularity. Although this game was introduced to the country by foreigners, the locals has caught on with the game over the preceding decades and were now beginning to beat the very people who had introduced cricket in the first place.

Naturally, I fell love with the game and wanted to play. As I started to show some talent in playing the game, my father had a serious talk with me. He taught me that life is truly about trade-offs. He told me that you need to analyze what those trade-offs are and how they impact your life. So, I analyzed and here I am – working in the Silicon Valley and enjoying good career that is ‘yielding’ very well for me.

When things are simple, you can analyze based on rules. The rule in my house was that I had to get at least an A- and then I could do whatever I pleased. Early on in my school years, it was easy to follow that rule and still keep playing cricket.

As high school became increasing competitive, I could no longer follow the rule. I was violating the rule, but I didn’t know what I was giving up nor what I was gaining by doing that. When my father again explained to me what the trade-offs were, it was clear that I could no longer break the rule.

My father was right. It is always crucial to perform trade-off analysis. It is not enough to get a Go/No Go answer. If the answer is No Go – the question is, what can I do about it? And if I decide to live with that answer, what am I gaining. Alternatively, if I decide to comply with the rule to get a Go answer, what do I have to give up to achieve that result?

Fast forwarding a few years after my cricket story ended, I was busy doing ECL designs at Fujitsu Microelectronics. At that time, ECL was mainly used to achieve performance that CMOS could not offer. For example, 1 GHz or above was only possible with ECL, but there were many manufacturing challenges.

Our manufacturing experts used to characterize previous chips and create rules that described failing patterns. We used to create a floorplan of the logic first, and then estimate the routing and analyze the routing patterns for failure during manufacturing. If the failure proved to be prohibitive, we would change the floorplan and routing to avoid those patterns that created most failure. Once again, here I was evaluating trade-offs based on rules. Those ECL designs were between 800 to 2000 gates – total!

Of course, when things are simple, you can easily do trade-off analysis based on rules. But, just imagine doing that same ECL design today, but instead of 1000 gates, you're designing 10 million gates or more without increasing the die sizes – the beauty of semiconductor technology is that you can design over 10 million gates on a 17x17 mm die today. Not only is the gate count up, but you're also dealing with the additional complicating factor of increased metal layer count. Those early designs used just 2 levels of metal, whereas now we are designing with 9 or 10 levels of metal.

Meanwhile, all of this increased complexity may promise much, but if you can only get one good die per wafer, that complexity is for naught. There are many design-related manufacturing issues and many process-related ones as well that that bear on the yield picture. Clearly, what designers need is a way to model these issues and apply that model to their design to analyze their trade-offs.

However, life for designers today is already complex. Even before considering models – the designers have to deal with area, timing, and power trade-offs, while also contending with short design cycles and little time to change strategies that have been successful in the past.

Today’s designers demand evolutionary methodology with revolutionary results. They have been analyzing for area and timing issues to enhance their designs for many years. Then they added power as another parameter a few years ago. Now, if with very little additional effort, they get the idea of trade-offs among area, timing, power and yield, along with some guideline on how to enhance their designs and ‘what-if’ analysis, the designers would undoubtedly embrace such a methodology with great enthusiasm.

The child in every engineer is reluctant to follow any rules – especially, when their life is already so complicated. These people don’t want another 1000 pages of rules and a rule-based system that doesn’t give them any practical tradeoffs. They need an elegant solution that evolves their methodologies to provide quantifiable trade-offs with respect to yield.

Look at it this way – when designers can tapeout their complex chips with yields in the ballpark, they are then free to play cricket or any other ballgame they like!

Now, that is a trade-off I would love to work for!

*****************************