EDA and Poker
***************************** Editor's Note: A lunchtime conversation with Dan Nenni at the Advanced Reticle Symposium in July led to this week's 'Voices' essay. Dan Nenni is a 20-year veteran of the EDA and semiconductor industry, but more importantly this summer he's been playing in the World Series of Poker. ***************************** Q: So Dan, what have you been up to over the past year? A: Well mostly, I was busy recovering from a serious bicycle accident. I’ll skip the gory details and just say that my survival is the closest thing to a miracle that I will ever experience. So besides therapies of all types, I spent most of my time researching DFM and playing poker. Q: Researching DFM? A: Okay, mostly playing poker.Q: Poker like you see on TV? A: Yes, I play mostly tournament poker which is exactly what you see on TV. In fact, I qualified for the World Series of Poker, which will be broadcast towards the end of the summer. I also plan on playing World Poker Tour events next year, which will be televised as well.Poker today is a lot like EDA where 90% of the money is made by 10% of the players, so I would not recommend it as a full-time profession. As they say, playing poker is a hard way to make an easy living! Q: Poker and EDA is an interesting comparison. A: Actually poker has quite a bit in common with EDA. Poker is highly analytical with a strong mathematical base. Poker is also psychological since you're working with imperfect information while facing fierce competition.What separates the real poker players from the fish (bad poker players) is the ability to read the other players and win, whether your hand is good or bad. This skill applies directly to EDA – the Design Automation Conference is a great example. Q: DAC? A: Well, as I walked through this year's show I couldn’t help but notice the emphasis on DFM from EDA companies large and small. Even TSMC is now in the DFM fray!One thing you'll see in poker is that when players have a bad hand, they tend to come out strong to get the others to fold (bark and no bite). And when a player has the nutz, (best possible poker hand), they come out weak to try and break the other players. It’s called trapping or doing "a Roosevelt" – speak softly and carry a big stick! From the DAC floor, quite a few companies were screaming about DFM – but if you took a close look, there was very little substance and really just "more of the same." Yet on the other side of the show floor, there were new DFM companies with appointment-only suites that had some very interesting stuff. Q: What is your personal take on DFM? A: I published an article in EETimes back in January of 2003 and defined DFM as Desperate For Money – I think it was John Cooley who later defined it as Design For Marketing, which was very accurate at the time.To me DFM today is all about yield. Fabless companies consider DFM as taking recommended design rules – the only real yield optimization information available from outside foundries – and applying it to layout. Place-and-Route tools and some point tools now have yield optimization capabilities such as wire spreading and redundant via insertion, but without design and process yield data they are "DFM-ing" in the dark. IDMs, on the other hand, have always had an unfair yield advantage over fabless designers. IDMs have direct access to fab defect data and have done yield analysis and yield prediction for years now, which is what DFM is really about, right? In my opinion, the best opportunity for DFM today is to integrate yield analysis and prediction into the design cycle. This will not only tell designers what parts of their designs will have yield problems, it will also tell the design tools how to fix them and what the yield benefit will be. But to do this, you will need access to the process yield data from the foundries. Q: So why can’t fabless companies get yield data? A: You will have to ask the foundries. Remember, it wasn't long ago that foundries wouldn't release even DRC decks much less design rules, right? And now you can get both from the corner market. So why hold back process defect data? Isn't better yield good for all?Today’s fabless designers deserve better and shouldn’t be forced to gamble with their designs by working with imperfect information. IC design shouldn't be like poker – it shouldn't be a hard way to make an easy living! I would suggest that for more information on playing poker visit www.recpoker.com. And for more information on yield analysis visit www.icyield.com. ***************************** August 1, 2005
Dan Nenni's sales and marketing background range from computer manufacturers (Data General and Solbourne Computer), to semiconductor design (Vadem and GateField) and EDA (Zycad, Avanti, Sagantec, and Prolific). He's authored and co-authored numerous articles and papers on physical design optimization and design for manufacture, and has a related patent pending. Dan's degrees are in electronics, computer science, and business. |